253 test 2
Test may NOT be "made up" without prior arrangements or VERIFIED EMERGENCY!

This guide is not a "promise" of what will be on the test, but is simply an outline of topics that MAY be on the test that I provide to be helpful to you. Other topics not listed may also sneak onto a test from time to time.
Understand that a test is a SAMPLING and can not possibly cover all information from class. The idea, however, is that you must study all the information since you don't know for certain what questions will show up. This is for your benefit as it motivates you to learn more! And finally, to avoid the "you said that topic would/would not be on the test" problem, my new "stock answer" for the question, "will this be on the test?", is now: "I can neither confirm nor deny the presence of that topic on the next test."(ref: US Navy)

Make a CAP!

- HW & Program execution Registers speed sizes: 8 bit, 16 bit 32 bit names special purposes SS , RAM , CPU execution sequence IP & context Speeds clock speed vs clock cycle mHz, gHz micro, nano - Representation bases binary hex decimal octal unsigned binary numbers range: 0 to (2^n)-1 signed ones complement - NO sign magnitude - NO 2s complement numbers - YES range: -2^(n-1) to 2^(n-1)-1 fractional binary 4 2 1 . .5 .25 .125 fixed point example: 8 bits might be 5:3 - 5 for the integer, 3 for the fraction floating point IEEE 754 32 bit (float) sign (1 bit) exponent: bias 127 (8 bits) fraction: normalized with implied "1" (23 bits) ascii (7 bit) vs utf-8 (variable byte length encoding) why? how? - Organization sizes bytes, words, dwords little endian => low order byte at low address 010016 is 25610 2 bytes (why?) 00 is low byte, 01 is high byte stored as low address = 00 hi address = 01 big endian stores lo byte in hi address - Defining Storage byte db word dw dword dd Ram how do we address? number of bits needed to address n bytes of RAM log2 n 2x = n - Moving Data same size no memory to memory *includes ptr to ptr mov [edi], [esi] no - mem to mem ambiguous size - use ptr cmp 0, byte ptr[esi] cmp al, [esi] mov does NOT set flags XCHG swaps - Memory addresses: Pointers LEA, OFFSET lea edi, memory pointers! PTR directive cmp byte ptr[si], 7 ; why needed?? direct offset addressing x db 1,2,3 mov al, x+1 ; moves 2 into al - Arithmetic add sub overflow signed unsigned inc (no carry flag) dec - Logic: Setting, using flags, CMP and jumps FLAGS Z - determine equality often 1 if result is zero N - simply a copy of high bit COULD be negative C, O - determine when result is too large MOV has NO effect O(verflow) signed C(arry) unsigned inc, dec NO effect on C O (s) signed overflow: in 8 bits signed, 127 + 1 creates overflow - O flag set C (u) unsigned overflow: in 8 bits, 255 + 1 creates overflow - C flag set TEST AND CMP sets flags ONLY test -> logically 'and' test al, 1 cmp -> 'subtract' second from first cmp al, bl ; al-bl jg big ; jump if al is greater than bl (signed) CONDITIONAL JUMPS use with cmp JA JB (uns) JG JL (sign) use with test or math operators JE JZ JNE JNZ check for unsigned/signed overflow JC JO AND, OR, XOR, masks clearing bits AND 0111 1110 will CLEAR first and last bit (zeroes) setting bits OR 0000 1111 will SET rightmost 4 bits (ones) xor can clear XOR al,al NOT, NEG NOT flips bits 1's complement NEG negates (takes 2s complement) - LOOP & LABELS jmps machine code for loop signed offset from NEW ip** L1: add al, 1 100 04 01 jz L1 102 75 FC ; FC is ? mov bl, 100 104 B3 64 loop uses CX decrement and loop if > 0 conditional jumps use flags je, jz => z flag jc js jb, ja unsigned jg, jl signed PROCEDURES remember that return address always at top of stack [sp] calling mechanics stack ip arguments stack regsisters in memory problematic saving registers push, pusha pop, popa doc explain why? registers used STACKS: pop, push always 16 bits pusha, popa all regs pushf, popf flags INTERRUPTS VIA INT XXH os bios provide arguments in registers - Devices microcontroller OUT, IN ports no OS manipulate individual bits - Interrupts vector runs interrupt handler code - C and asm embedded asm __asm speed register access makes code NON-PORTABLE isolate into functions stack args ESP - you just "know" what the args are :) points to top of stack return address (4 bytes) ESP+4 first arg ESP+8 second arg (assume 4 byte arg) pointer increment ** ex: pointer to int +1 c +4 asm - Debug program in binary all 1s and 0s

EXAMPLES: ======== show registers after operations mov ax, 7765h add al, 5 or ah, 0ffh show flags after operations show output of code loops nested loops write code for a proc manipulate values process array output