253 test 2
Test may NOT be "made up" without prior arrangements or VERIFIED EMERGENCY!

This guide is not a "promise" of what will be on the test, but is simply an outline of topics that MAY be on the test that I provide to be helpful to you. Other topics not listed may also sneak onto a test from time to time.
Understand that a test is a SAMPLING and can not possibly cover all information from class. The idea, however, is that you must study all the information since you don't know for certain what questions will show up. This is for your benefit as it motivates you to learn more! And finally, to avoid the "you said that topic would/would not be on the test" problem, my new "stock answer" for the question, "will this be on the test?", is now: "I can neither confirm nor deny the presence of that topic on the next test."(ref: US Navy)

Make a CAP!

   
  - HW & PROGRAM EXECUTION
      Registers
         speed
         sizes: 8 bit, 16 bit 32 bit
         names
         special purposes
      SS , RAM , CPU
         execution sequence
         IP & context
      Speeds
        clock speed vs clock cycle
         mHz, gHz
         micro, nano

  - REPRESENTATION
      bases
         binary
         hex
         decimal
         octal
      unsigned binary numbers
          range: 0 to (2^n)-1
         
      signed
         ones complement - NO
         sign magnitude - NO
         2s complement numbers - YES
            range: -2^(n-1) to 2^(n-1)-1
            
      fractional binary
        4  2  1  .  .5  .25  .125
        fixed point
           example: 8 bits might be 5:3 - 5 for the integer, 3 for the fraction
        floating point    
            IEEE 754
               32 bit (float)
                  sign (1 bit)
                  exponent: bias 127 (8 bits)
                  fraction: normalized with implied "1" (23 bits)
                  
      ascii (7 bit) vs utf-8 (variable byte length encoding) 
         why? how?                  

  - ORGANIZATION
      sizes
      bytes, words, dwords
      
      little endian => low order byte at low address
         010016 is 25610
         2 bytes (why?)
         00 is low byte, 01 is high byte
         stored as
            low address = 00
            hi  address = 01
      
      big endian stores lo byte in hi address
            
  - DEFINE STORAGE
      byte  db
      word  dw
      dword dd

      DUP
         allows you create MANY bytes of memory (arrays)
         arr db 250 dup(0) ; 250 bytes of zeroes
         x db 500 dup(?) ; 500 bytes of unitialized
         y dw 100 dup(256) ; 100 words (200 bytes) of the value 256 

      Ram
         how do we address?
         x is the number of bits needed to address n bytes of RAM
            x = log2 n
             or
            2x = n

  - MOVING DATA
      same size
      no memory to memory
         *includes ptr to ptr
         mov [edi], [esi] no - mem to mem
         
      ambiguous size - use ptr         
         cmp 0, byte ptr[esi] 
         cmp al, [esi] 
         
      mov does NOT set flags
      XCHG swaps
      
  - POINTERS
      LEA, OFFSET
      lea edi, memory
         pointers!
      PTR directive
         cmp byte ptr[si], 7 ; why needed??
      direct offset addressing
         x db 1,2,3
         mov al, x+1 ; moves 2 into al         
      
  - ARITHMETIC
      add
      sub
      overflow
         signed 
         unsigned
      inc (no carry flag)
      dec
      
  - LOGIC: Setting, using flags, CMP and jumps
         FLAGS   

         Z - determine equality
            Z is 1 if result is zero
            cmp subtracts and sets Z if equal (4-4 is zero)

         N - simply a copy of high bit
            COULD be negative
            
         C, O - determine when result is too large
            MOV has NO effect
            O(verflow) signed 
            C(arry) unsigned
               inc, dec NO effect on C
            O (s) signed overflow: in 8 bits signed,  127 + 1 creates overflow - O flag set
            C (u) unsigned overflow: in 8 bits, 255 + 1 creates overflow - C flag set   
      
         TEST AND CMP
            sets flags ONLY
            does not change operands

            test -> logically 'and'
               test al, 1
            
            cmp -> 'subtract' second from first
               cmp al, bl ; al-bl
               jg big     ; jump if al is greater than bl (signed)         
            
         CONDITIONAL JUMPS
            use with cmp
            JA JB (uns)  
            JG  JL (sign)
            
            use with test or math operators
            JE   JZ
            JNE  JNZ
            
            check for unsigned/signed overflow      
            JC  
            JO

         AND, OR, XOR,
            masks
            clearing bits
               AND 0111 1110 will CLEAR first and last bit (zeroes) 
            setting bits
               OR 0000 1111 will SET rightmost 4 bits (ones)          
            xor can clear 
               XOR al,al
               
         NOT, NEG
            NOT   (takes 1's complement: flips bits) 
            NEG negates (takes 2s complement: flips bits, then add 1)
                 
      
  - LOOP & LABELS
      jmps
      machine code for loop 
         signed offset from NEW ip**
            L1: add al, 1     100  04 01
                jz L1         102  75 FC ; FC is -4: why?
                mov bl, 100   104  B3 64          
      loop
         uses CX
         decrement and loop if > 0
         
      conditional jumps use flags
         je, jz => z flag
         jc
         js
         jb, ja  unsigned
         jg, jl  signed
      

      
   PROCEDURES
      remember that return address always at top of stack 
         [sp]
      calling mechanics
         stack
         ip
      arguments
         stack
         regsisters
         in memory problematic
         
      saving registers
         push, pusha
         pop, popa
         
      doc
         explain
         why?
         registers used

         
   STACKS:
      pop, push always 16 bits
      pusha, popa all regs
      pushf, popf flags

      
   INTERRUPTS VIA INT XXH
      os
      bios
      provide arguments in registers
                  
      
  - DEVICES
      microcontroller
      OUT, IN
      ports
      no OS
      manipulate individual bits
      
      - Interrupts
            vector
            runs interrupt handler code
      
  - C & ASM  
      link together asm files and c files
         pass arguments
            stack args
               ESP - you just "know" what the args are :)
                     points to top of stack
                     return address (4 bytes)
               ESP+4 first arg 
               ESP+8 second arg (assume 4 byte arg)
         return values
            EAX
            use references (pointers)
               mov esi, reference(address)
               mov [esi], value to retrurn

      pointers
         sizes of items pointed to
         malloc dynamic allocation

      printf
      scanf

      embedded asm
         __asm
            speed
            register access
            makes code NON-PORTABLE
               isolate into functions
            
         pointer increment **
            ex: pointer to int
            +1 c
            +4 asm      
      
     
  - ARCHITECTURE
      gates
      truth tables
      boolean expressions
      sum of products
      half adder
      full adder
      mux - selector
         your program triggers
         determines data path
      detect overflow looking at high bit!



EXAMPLES: ======== show registers after operations mov ax, 7765h add al, 5 or ah, 0ffh show flags after operations show output of code loops nested loops write code for a proc manipulate values declare, process, print array output microcontroller outputting values to control device turn on/off lights