A little tricky...
- mul and div perform UNSIGNED operations
- imul and idiv perform SIGNED operations
- use DEFINED registers for operations
- depend on SIZE of operand

MUL instruction

mul ALWAYS uses
===============
AL for 8 bit ops, product is AX
AX for 16 bit ops, product is DX:AX
EAX for 32 bit ops, product is EDX:EAX
mov al, 5d
mov bl, 10d
mul bl
; ax is 50d
; ah is 0, upper half of product is zero(ah is 0)
USE IMUL for signed multiplication

DIV instruction

If the divisor is 8 bits:
=========================
Dividend is ALWAYS AX.
Quotient is ALWAYS AL,
Remainder is ALWAYS AH
mov AX, 1000 ; dividend
mov BL, 5 ; divisor - can be any 8 bit reg OR memory operand
div BL ; divide 1000 by 5
; AL is quotient => 200
; AH is remainder => 0
mov AX, 400 ; dividend
mov CH, 3 ; divisor
div CH ; divide 400 by 3
; al is quotient => 133
; ah is remainder => 1
If the divisor is 16 bits:
==========================
dividend is DX:AX, Q is AX, R is DX
** USE IDIV for signed division

SHL, SHR - shift left & right instructions

Remember!
SHL
===
- shifting LEFT 1 bit multiplies by TWO
- fills rightmost(low) bit with ZERO
- high bit to carry flag
shl AL, 1
AL
==
|0|0|0|0|0|0|0|1|1| becomes |0|0|0|0|0|0|1|1|0|
(3d) (6d)

SHR === - shifting RIGHT 1 bit divides by 2 - high bit becomes ZERO - rightmost (low) bit to carry flag shr AL, 1 AL == |0|0|0|0|0|0|1|1|0| becomes |0|0|0|0|0|0|0|1|1| (6d) (3d)

ALSO ==== SAR, SAL - shift aritmetic - SAL same as SHL - SAR div class="code"serves the value of the hi bit to div class="code"serve sign (1 if 1, 0 if 0) ROR, ROL - rotate ======== - low bit on ROR goes to hi bit - hi bit on ROL goes to low bit

SHR === - shifting RIGHT 1 bit divides by 2 - high bit becomes ZERO - rightmost (low) bit to carry flag shr AL, 1 AL == |0|0|0|0|0|0|1|1|0| becomes |0|0|0|0|0|0|0|1|1| (6d) (3d)

ALSO ==== SAR, SAL - shift aritmetic - SAL same as SHL - SAR div class="code"serves the value of the hi bit to div class="code"serve sign (1 if 1, 0 if 0) ROR, ROL - rotate ======== - low bit on ROR goes to hi bit - hi bit on ROL goes to low bit